; Disassembly of the file "Z:\home\knoppix\CoBra Project\Software\CPM\CPM 860K analysis\BIOS.bin"
; 
; CPU Type: Z80
; 
; Using the opcode map file "Z:\home\knoppix\CoBra Project\Software\CPM\CPM 860K analysis\BIOS.bin.opmap"
; ; Created with dZ80 2.0
; 
; on Friday, 03 of February 2017 at 07:17 PM
; 
F600 C32DFE	JP	$FE2D	; BOOT   (00 - Cold Start)
F603 C37EF8	JP	$F87E	; WBOOT  (01 - Warm Boot)
F606 C313F7	JP	$F713	; CONST  (02 - Check for Console Char Ready)
F609 C376F7	JP	$F776	; CONIN  (03 - Read Console Char In)
F60C C385F7	JP	$F785	; CONOUT (04 - Write Console Char Out)
F60F C3D1F9	JP	$F9D1	; LIST   (05 - Write Listing Char Out)
F612 C3DCF9	JP	$F9DC	; PUNCH  (06 - Write Char to Punch dev)
F615 C31EFA	JP	$FA1E	; READER (07 - Read Reader dev)
F618 C3D9F7	JP	$F7D9	; HOME   (08 - Go to Track 00 on selected drive)
F61B C395F7	JP	$F795	; SELDSK (09 - Select Disk Drive)
F61E C3DBF7	JP	$F7DB	; SETTRK (0A - Set Track Number)
F621 C3E0F7	JP	$F7E0	; SETSEC (0B - Set Sector Number)
F624 C3E6F7	JP	$F7E6	; SETDMA (0C - Set DMA Address)
F627 C32EF8	JP	$F82E	; READ   (0D - Read Selected Sector)
F62A C334F8	JP	$F834	; WRITE  (0E - Write Selected Sector)
F62D C3C2F9	JP	$F9C2	; LISTST (0F - Return LST dev Status
F630 C3EBF7	JP	$F7EB	; SECTRAN(10 - Sector Translation)
F633 C31AF8	JP	$F81A	; UNK #1
F636 C31EF8	JP	$F81E	; UNK #2
F639 C3B6F9	JP	$F9B6	; UNK #3
F63C C39EFA	JP	$FA9E	; UNK #4

F63F 1E		DEFB	$1E
F640 43		DEFB	$43	; 8255/Port C mirror (initial value with O6=1 -> VRAM CPU access)
F641 00		DEFB	$00
F642 00		DEFB	$00
F643 07		DEFB	$07
F644 00		DEFB	$00
F645 00		DEFB	$00	; \
F646 63		DEFB	$63	; /base of character generator in VRAM
F647 11		DEFB	$11
F648 08		DEFB	$08
F649 01		DEFB	$01
F64A 00		DEFB	$00
F64B 19		DEFB	$19
F64C 00		DEFB	$00
F64D 01		DEFB	$01
F64E FF		DEFB	$FF
F64F 06		DEFB	$06
F650 02		DEFB	$02
F651 00		DEFB	$00	; (F651) physical drv#
F652 00		DEFB	$00	; (F652) track#
F653 00		DEFB	$00	; (F653) head#
F654 00		DEFB	$00	; (F654) physical sector# + 1
F655 00		DEFB	$00	; (F655) logical sector#
F656 00		DEFB	$00
F657 00		DEFB	$00	; \ DMA addr for subsequent
F658 00		DEFB	$00	; / read/write operations
F659 00		DEFB	$00	; \ DPB addr for
F65A 00		DEFB	$00	; / current drive
F65B 00		DEFB	$00
F65C 00		DEFB	$00	; (F65C) crt. logical drv#
F65D 00		DEFB	$00	; (F65D) current drive (?)
F65E 00		DEFB	$00	; (F65E) max. logical drv#
F65F 01		DEFB	$01	; (F65F) backup of max. logical drv#
F660 02		DEFB	$02
F661 0A		DEFB	$0A
F662 20		DEFB	$20
F663 FF		DEFB	$FF
F664 EF		DEFB	$EF
F665 3F		DEFB	$3F
F666 77		DEFB	$77
F667 F6		DEFB	$F6
F668 48		DEFB	$48
F669 00		DEFB	$00
F66A 04		DEFB	$04
F66B 0F		DEFB	$0F
F66C 00		DEFB	$00
F66D 79		DEFB	$79
F66E 01		DEFB	$01
F66F 7F		DEFB	$7F
F670 00		DEFB	$00
F671 C0		DEFB	$C0
F672 00		DEFB	$00
F673 20		DEFB	$20
F674 00		DEFB	$00
F675 02		DEFB	$02
F676 00		DEFB	$00

F677 00		DEFB	$00	; (F677) ##### XLT #5 ##### (9 sec/trk, interlace=2)
F678 02		DEFB	$02
F679 04		DEFB	$04
F67A 06		DEFB	$06
F67B 08		DEFB	$08
F67C 01		DEFB	$01
F67D 03		DEFB	$03
F67E 05		DEFB	$05
F67F 07		DEFB	$07

F680 00		DEFB	$00
F681 02		DEFB	$02
F682 09		DEFB	$09
F683 20		DEFB	$20
F684 FF		DEFB	$FF
F685 EF		DEFB	$EF
F686 3F		DEFB	$3F
F687 98		DEFB	$98
F688 F6		DEFB	$F6
F689 24		DEFB	$24
F68A 00		DEFB	$00
F68B 03		DEFB	$03
F68C 07		DEFB	$07
F68D 00		DEFB	$00
F68E AA		DEFB	$AA
F68F 00		DEFB	$00
F690 3F		DEFB	$3F
F691 00		DEFB	$00
F692 C0		DEFB	$C0
F693 00		DEFB	$00
F694 10		DEFB	$10
F695 00		DEFB	$00
F696 02		DEFB	$02
F697 00		DEFB	$00

F698 00		DEFB	$00	; (F698) ##### XLT #6 ##### (9 sec/trk, interlace=4)
F699 04		DEFB	$04
F69A 08		DEFB	$08
F69B 03		DEFB	$03
F69C 07		DEFB	$07
F69D 02		DEFB	$02
F69E 06		DEFB	$06
F69F 01		DEFB	$01
F6A0 05		DEFB	$05

F6A1 02		DEFB	$02
F6A2 09		DEFB	$09
F6A3 20		DEFB	$20
F6A4 FF		DEFB	$FF
F6A5 EF		DEFB	$EF
F6A6 3F		DEFB	$3F
F6A7 B8		DEFB	$B8
F6A8 F6		DEFB	$F6
F6A9 48		DEFB	$48
F6AA 00		DEFB	$00
F6AB 04		DEFB	$04
F6AC 0F		DEFB	$0F
F6AD 00		DEFB	$00
F6AE AA		DEFB	$AA
F6AF 00		DEFB	$00
F6B0 7F		DEFB	$7F
F6B1 00		DEFB	$00
F6B2 C0		DEFB	$C0
F6B3 00		DEFB	$00
F6B4 20		DEFB	$20
F6B5 00		DEFB	$00
F6B6 02		DEFB	$02
F6B7 00		DEFB	$00

F6B8 00		DEFB	$00	; (F6B8) ##### XLT #7 ##### (9 sec/trk, interlace=2)
F6B9 02		DEFB	$02
F6BA 04		DEFB	$04
F6BB 06		DEFB	$06
F6BC 08		DEFB	$08
F6BD 01		DEFB	$01
F6BE 03		DEFB	$03
F6BF 05		DEFB	$05
F6C0 07		DEFB	$07

F6C1 00		DEFB	$00
F6C2 02		DEFB	$02
F6C3 09		DEFB	$09
F6C4 20		DEFB	$20
F6C5 FF		DEFB	$FF
F6C6 EF		DEFB	$EF
F6C7 3F		DEFB	$3F
F6C8 D9		DEFB	$D9	; \ CP/M PROTECTION
F6C9 F6		DEFB	$F6	; / CODE for drives 2, 3
				; (F6CA) ######## DPB #2-#7 ########
F6CA 50		DEFB	$50	; \
F6CB 00		DEFB	$00	; /SPT = 0050 (128-byte Sectors Per Track counting both sides = 80)
F6CC 04		DEFB	$04	;  BSH = 04 \these values give
F6CD 0F		DEFB	$0F	;  BLM = 0F /a block size of 2K
F6CE 00		DEFB	$00	;  EXM = 00
F6CF A3		DEFB	$A3	; \
F6D0 01		DEFB	$01	; /DSM = 01A3
F6D1 7F		DEFB	$7F	; \
F6D2 00		DEFB	$00	; /DRM = 007F
F6D3 C0		DEFB	$C0	;  AL0 = C0
F6D4 00		DEFB	$00	;  AL1 = 00
F6D5 20		DEFB	$20	; \
F6D6 00		DEFB	$00	; /CKS = 0020
F6D7 02		DEFB	$02	; \
F6D8 00		DEFB	$00	; /OFF = 0002

F6D9 00		DEFB	$00	; (DFD9) ##### XLT #2-#4 ##### (10 sec/trk, interlace=2)
F6DA 02		DEFB	$02
F6DB 04		DEFB	$04
F6DC 06		DEFB	$06
F6DD 08		DEFB	$08
F6DE 01		DEFB	$01
F6DF 03		DEFB	$03
F6E0 05		DEFB	$05
F6E1 07		DEFB	$07
F6E2 09		DEFB	$09

F6E3 1A		DEFB	$1A
F6E4 07		DEFB	$07
F6E5 80		DEFB	$80
F6E6 BF		DEFB	$BF
F6E7 17		DEFB	$17
F6E8 F9		DEFB	$F9	; \ CP/M PROTECTION
F6E9 F6		DEFB	$F6	; / CODE for drives 0, 1
				; (F6EA) ######## DPB #0-#1 ########
F6EA 1A		DEFB	$1A	; \
F6EB 00		DEFB	$00	; /SPT = 001A (128-byte Sectors Per Track counting both sides = 26)
F6EC 03		DEFB	$03	;  BSH = 03
F6ED 07		DEFB	$07	;  BLM = 07
F6EE 00		DEFB	$00	;  EXM = 00
F6EF F2		DEFB	$F2	; \
F6F0 00		DEFB	$00	; /DSM = 00F2
F6F1 3F		DEFB	$3F	; \
F6F2 00		DEFB	$00	; /DRM = 003F
F6F3 C0		DEFB	$C0	;  AL0 = C0
F6F4 00		DEFB	$00	;  AL1 = 00
F6F5 10		DEFB	$10	; \
F6F6 00		DEFB	$00	; /CKS = 0010
F6F7 02		DEFB	$02	; \
F6F8 00		DEFB	$00	; /OFF = 0002

F6F9 00		DEFB	$00	; (F6F9) ###### XLT #0-#1 ###### (26 sec/trk, skew=6)
F6FA 06		DEFB	$06
F6FB 0C		DEFB	$0C
F6FC 12		DEFB	$12
F6FD 18		DEFB	$18
F6FE 04		DEFB	$04
F6FF 0A		DEFB	$0A
F700 10		DEFB	$10
F701 16		DEFB	$16
F702 02		DEFB	$02
F703 08		DEFB	$08
F704 0E		DEFB	$0E
F705 14		DEFB	$14
F706 01		DEFB	$01
F707 07		DEFB	$07
F708 0D		DEFB	$0D
F709 13		DEFB	$13
F70A 19		DEFB	$19
F70B 05		DEFB	$05
F70C 0B		DEFB	$0B
F70D 11		DEFB	$11
F70E 17		DEFB	$17
F70F 03		DEFB	$03
F710 09		DEFB	$09
F711 0F		DEFB	$0F
F712 15		DEFB	$15
					; ############ BIOS #02 CONST #############
F713 3A0300	LD	A,($0003)
F716 E602	AND	$02
F718 C227FA	JP	NZ,$FA27
F71B 3A4CF6	LD	A,($F64C)
F71E B7		OR	A
F71F C8		RET	Z

F720 214EF6	LD	HL,$F64E
F723 CB7E	BIT	7,(HL)
F725 C8		RET	Z

F726 7E		LD	A,(HL)
F727 2E50	LD	L,$50
F729 FE81	CP	$81
F72B 2821	JR	Z,$F74E
F72D FE89	CP	$89
F72F 2826	JR	Z,$F757
F731 FE90	CP	$90
F733 2826	JR	Z,$F75B
F735 2E47	LD	L,$47
F737 FE83	CP	$83
F739 2824	JR	Z,$F75F
F73B FE8B	CP	$8B
F73D 2825	JR	Z,$F764
F73F FEEE	CP	$EE
F741 3825	JR	C,$F768
F743 282C	JR	Z,$F771
F745 FEFE	CP	$FE
F747 2009	JR	NZ,$F752
F749 218062	LD	HL,$6280
F74C 181D	JR	$F76B
F74E 3E02	LD	A,$02
F750 AE		XOR	(HL)
F751 77		LD	(HL),A
F752 AF		XOR	A
F753 324CF6	LD	($F64C),A
F756 C9		RET

F757 3E04	LD	A,$04
F759 18F5	JR	$F750
F75B 3E40	LD	A,$40
F75D 18F1	JR	$F750
F75F 216A76	LD	HL,$766A
F762 1807	JR	$F76B
F764 CBC6	SET	0,(HL)
F766 18F7	JR	$F75F
F768 21B262	LD	HL,$62B2
F76B CDF4F5	CALL	$F5F4
F76E FB		EI
F76F 18E1	JR	$F752
F771 21E06D	LD	HL,$6DE0
F774 18F5	JR	$F76B
					; ############ BIOS #03 CONIN #############
F776 3A0300	LD	A,($0003)
F779 CB4F	BIT	1,A
F77B CA22F8	JP	Z,$F822
F77E 0F		RRCA
F77F D215F6	JP	NC,$F615
F782 C31EFA	JP	$FA1E
					; ############ BIOS #04 CONOUT #############
F785 47		LD	B,A
F786 3A0300	LD	A,($0003)
F789 CB4F	BIT	1,A
F78B CA28F8	JP	Z,$F828
F78E 0F		RRCA
F78F D2DCF9	JP	NC,$F9DC
F792 C312F6	JP	$F612
					; ############ BIOS #09 SELDSK #############
					; inputs:	C = logical drive no. to be selected
					; outputs:	DE = DPB base addr of the logical/physical drv# selected or 0004 if nonexistent drive selected
					;		HL = DPH base address or 0000 if nonexistent drive selected
					; results:	(F65C) = logical drive no. to be selected
					;		(F65E) = 04 if A:-D: to be sel, or 03 if E:-H: to be sel (max. logical drv#)
					;		(F651) = physical drv# to be selected according to table at FC00
F795 210400	LD	HL,$0004	; addr of user#(bits4-7)/default_logical_drv#(bits0-3)
F798 46		LD	B,(HL)		; B = default_logical_drv#
F799 AF		XOR	A		; A = $00
F79A 77		LD	(HL),A		; ($0004) = $00 (set default logical drv to A:)
F79B EB		EX	DE,HL		; DE = $0004
F79C 67		LD	H,A
F79D 6F		LD	L,A		; HL = $0000
F79E 79		LD	A,C		; A = logical drv# to be selected
F79F FE08	CP	$08		; compare to logical drv I:
F7A1 D0		RET	NC		; return with error if drv# to be selected greater than H:

F7A2 FE04	CP	$04		; compare to logical drv E:
F7A4 3809	JR	C,$F7AF		; jump if drv# to be selected < E: -> -->|
F7A6 3A5CF6	LD	A,($F65C)	; A = crt. logical drv			 |
F7A9 FE04	CP	$04		; compare to logical drv E:		 |
F7AB 3802	JR	C,$F7AF		; jump if crt. logical drv < E: ---> --->|
F7AD 00		NOP			;					 |
F7AE 00		NOP			;					 |
F7AF 79		LD	A,C		; A = logical drv# to be selected <--- <-|
F7B0 325CF6	LD	($F65C),A	; crt. logical drv = logical drv to be selected
F7B3 EB		EX	DE,HL		; DE=$0000, HL=$0004
F7B4 70		LD	(HL),B		; ($0004) = unchanged since B=($0004) at line F798
F7B5 2100FC	LD	HL,$FC00	; addr of physical drv# for A
F7B8 B5		OR	L		; A+L=A (L=00) ---> this is just for resetting the Carry flag
F7B9 6F		LD	L,A		; HL now points to physical drv# of the logical drive selected
F7BA 7E		LD	A,(HL)		; *** A = physical drv# to be selected
F7BB 3251F6	LD	($F651),A	; physical drv# currently selected
F7BE CB51	BIT	2,C		; test bit 2 of logical drv# to be selected
F7C0 2801	JR	Z,$F7C3		; if 0 (logical drive A:-D:) skip next line --->|
F7C2 79		LD	A,C		; *** A = logical drv# to be selected		|	; *** A = physical drv# if A:-D:, logical drv# if E:-H:
F7C3 1100FB	LD	DE,$FB00	; FB00 = start addr of DPH areas (DPBASE) <-----|
F7C6 07		RLCA			; CY flag previously reset to 0
F7C7 07		RLCA
F7C8 07		RLCA
F7C9 07		RLCA			; A shifted 4 bits left (DPH length is 16 bytes) so A = x0, where x = logical/physical drv#
F7CA B3		OR	E		; does nothing, E=00
F7CB 5F		LD	E,A		; DE = DPH base addr for logical/physical drv# selected
F7CC F60A	OR	$0A		; A = A + 0Ah = xAh, where x = logical/physical drv# on 4 bits
F7CE 6F		LD	L,A
F7CF 62		LD	H,D		; HL = FBxA where x = drv# (HL points to the DPB of DPH number x in the DPH table)
F7D0 7E		LD	A,(HL)		; A = DPB lower byte
F7D1 23		INC	HL		; HL points to upper byte of DPB
F7D2 66		LD	H,(HL)		; H = DPB upper byte
F7D3 6F		LD	L,A		; L = DPB lower byte, so HL = DPB address of the DPH number x
F7D4 2259F6	LD	($F659),HL	; (F659) = DPB address of the DPH number x
F7D7 EB		EX	DE,HL		; HL = DPH base addr for logical/physical drv# selected, DE = DPB base addr of the logical/physical drv# selected
F7D8 C9		RET
					; ############ BIOS #08 HOME #############
F7D9 0E00	LD	C,$00
F7DB 2152F6	LD	HL,$F652	; ############ BIOS #0A SETTRK #############
F7DE 71		LD	(HL),C
F7DF C9		RET
					; ############ BIOS #0B SETSEC #############
F7E0 0C		INC	C
F7E1 2154F6	LD	HL,$F654
F7E4 71		LD	(HL),C
F7E5 C9		RET
					; ############ BIOS #0C SETDMA #############
F7E6 ED4357F6	LD	($F657),BC
F7EA C9		RET
					; ############ BIOS #10 SECTRAN #############
					; inputs:   C = logical sector# (LSN) (128-byte Sectors Per Track counting both sides)
					;	   DE = XLT table address
					; outputs: HL = physical sector#
					;	   ($F653) = head#
F7EB 79		LD	A,C		; A = LSN
F7EC 3255F6	LD	($F655),A	; store logical sector# at ($F655)
F7EF 2A59F6	LD	HL,($F659)	; ($F659) = DPB address of the current drive
F7F2 4E		LD	C,(HL)		; C = the Sector/Track (SPT) value from DPB (128-byte Sectors Per Track counting both sides)
F7F3 2153F6	LD	HL,$F653	; head# addr
F7F6 3600	LD	(HL),$00	; set head# to 0
F7F8 CB71	BIT	6,C		; test bit 6 of SPT (SPT < or > $40=64)
F7FA 2808	JR	Z,$F804		; if zero ---> ---> ---> --->| (if < 64)
F7FC CB39	SRL	C		; divide SPT by 2	     | ($48/2=$24)
F7FE B9		CP	C		; compare LSN w/ SPT	     |
F7FF 3803	JR	C,$F804		; if LSN < SPT ---> ---> --->| (if LSN is on side 0)
F801 91		SUB	C		; A=LSN-SPT 		     |
F802 3601	LD	(HL),$01	; set head# to 1	     |	
F804 6F		LD	L,A		; <--- <--- <--- <--- <--- <-| L = LSN
F805 2600	LD	H,$00		; HL=logical sector#						#############################
F807 3A51F6	LD	A,($F651)	; A = crt. physical drive#	\ -> LD A,($F659) *crt DPB addr	# MODIFICATION FOR 0 AND 1  #
F80A E602	AND	$02		; test if drive 2 or 3		/ -> CP $EA *test if DPB #0-#1	# TO BE DSDD 720K DRIVES    #
F80C 2804	JR	Z,$F812		; if not ---> ---> ---> ---->|					# << or just chg 2804->0000 #
F80E CB3D	SRL	L		;			     |
F810 CB3D	SRL	L		; divide LSN by 4	     | HL = LSN / 4
F812 7A		LD	A,D		; <--- <--- <--- <--- <--- <-|
F813 B3		OR	E		; test if DE=0000
F814 C8		RET	Z		; return if XLT table address given is 0000

F815 19		ADD	HL,DE		; add logical sector# to XLT base address
F816 6E		LD	L,(HL)		; read physical sector# in L
F817 2600	LD	H,$00		; HL=physical sector#
F819 C9		RET
					; ############ BIOS #11 UNK #1 #############
F81A 2198FD	LD	HL,$FD98	; ($FD98) = $F987
F81D C9		RET
					; ############ BIOS #12 UNK #2 #############
F81E 2145F6	LD	HL,$F645	; ($F645) = $6300
F821 C9		RET

F822 CD3AF8	CALL	$F83A
F825 C32066	JP	$6620

F828 CD3AF8	CALL	$F83A
F82B C36766	JP	$6667
					; ############ BIOS #0D READ #############
F82E CD3AF8	CALL	$F83A
F831 C3146E	JP	$6E14
					; ############ BIOS #0E WRITE #############
F834 CD3AF8	CALL	$F83A
F837 C3106E	JP	$6E10
					; ########### SET ACCESS TO VRAM ###########
F83A F3		DI
F83B E1		POP	HL		; HL=$F82B, this is called from $F828 above
F83C 3A40F6	LD	A,($F640)
F83F CB77	BIT	6,A		; test 06 (DRAM#1/VRAM access)
F841 2015	JR	NZ,$F858	; skip if VRAM access
F843 3242F6	LD	($F642),A	; backup current Port C if not
F846 F640	OR	$40		; set 06 for VRAM access
F848 3240F6	LD	($F640),A	; save in Port C mirror
F84B D3FE	OUT	($FE),A		; set 06 in Port C
F84D ED73EEFD	LD	($FDEE),SP	; save stack pointer to ($FDEE)
F851 31EEFD	LD	SP,$FDEE	; set stack at $FDEE
F854 115AF8	LD	DE,$F85A
F857 D5		PUSH	DE		; save $F85A on stack (RET will jump there, 3 lines below here)
F858 FB		EI
F859 E9		JP	(HL)		; jump back to $F82B and call $6667 in BLOCK#1

					; ########### SET ACCESS TO DRAM#1 ###########
F85A F3		DI
F85B 47		LD	B,A		; backup A in B
F85C EB		EX	DE,HL		; backup HL in DE
F85D 3E40	LD	A,$40
F85F 2142F6	LD	HL,$F642
F862 A6		AND	(HL)		; get value of bit 6 of ($F642) in A
F863 2B		DEC	HL
F864 2B		DEC	HL		; HL = $F640
F865 CBB6	RES	6,(HL)		; reset bit 6 of ($F640)
F867 B6		OR	(HL)		; A = ($F640) with value of bit 6 of ($F642)
F868 77		LD	(HL),A		; save it to ($F640)
F869 D3FE	OUT	($FE),A		; send to 8255
F86B EB		EX	DE,HL		; restore HL from DE
F86C 78		LD	A,B		; restore A from B
F86D ED7BEEFD	LD	SP,($FDEE)	; restore initial stack position
F871 FB		EI
F872 C9		RET
					; ########### CPM_TO_COBRA #############
					; The BIOS BOOT function at $FE2D changes the address of BIOS BOOT in the jump table at $F600
					; to the address of this routine
F873 F3		DI
F874 210000	LD	HL,$0000
F877 3EC1	LD	A,$C1
F879 D3FE	OUT	($FE),A		; set border to blue, 06 to "1" for VRAM access, SO to "1"
F87B ED4F	LD	R,A		; set bit 7 of R to "1" for BASIC access in startup cfg
F87D E9		JP	(HL)		; change hw config to startup by setting PO="1" and start BOOT ROM

					; ############ BIOS #01 WBOOT #############
F87E F3		DI
F87F 3A40F6	LD	A,($F640)	; A = 8255/Port C mirror
F882 F6C0	OR	$C0		; set bit 6 & 7
F884 D3FE	OUT	($FE),A		; set border to black, 06 to "1" for VRAM access, SO to "1"
F886 310001	LD	SP,$0100	; set stack at $0100
F889 3EC3	LD	A,$C3		; opcode for JP...
F88B 320000	LD	($0000),A	; ...stored at $0000
F88E 2103F6	LD	HL,$F603
F891 220100	LD	($0001),HL	; set locations $0001-$0002 to entry point of BIOS WBOOT: $F603
F894 320500	LD	($0005),A	; opcode for JP stored at $0005
F897 2106E8	LD	HL,$E806
F89A 220600	LD	($0006),HL	; set locations $0006-$0007 to entry point of BDOS: $E806
F89D 2190FD	LD	HL,$FD90
F8A0 1198FD	LD	DE,$FD98
F8A3 010800	LD	BC,$0008
F8A6 EDB0	LDIR			; copy CTC Interrupt Vector Table at $FD90-$FD97 over to $FD98-$FD9F. When done, BC=$0000 DE=$FDA0 HL=$FD98
F8A8 ED5E	IM	2		; next, deal with 80CTC
F8AA 7C		LD	A,H		; upper half of CTC interrupt table start address ($FD)...
F8AB ED47	LD	I,A		; ...is stored in register I (see Z80 docs)
F8AD 7D		LD	A,L		; lower half of CTC interrupt table start address ($98)...
F8AE D3E3	OUT	($E3),A		; ... is sent to CTC channel 0
					; int. vectors at (FD98-FD99) for CTC0, (FD9A-FD9B) for CTC1
					;		  (FD9C-FD9D) for CTC2, (FD9E-FD9F) for CTC3
					; CTC0...2 have CTC INT. ROUTINE #1 at $F987 (does nothing),
					; CTC3 has CTC INT. ROUTINE #2 at $F8C9
F8B0 3EFF	LD	A,$FF		; control word for CTC0 on next line (Enable Interrupt, Counter Mode, Rising Edge, Time Const. Follows, Reset, Control).
F8B2 D3E3	OUT	($E3),A		; write FF to CTC channel 0: set CTC0 to counter mode and enable CTC0 interrupts
					; MEANING: Reset, Enable Interrupts for Channel 0, a Time Constant follows.
F8B4 3E01	LD	A,$01		; time constant for CTC0 on next line: generate INT for each byte transferred from 8272 to µP
F8B6 D3E3	OUT	($E3),A		; write 01 to CTC channel 0
					; MEANING: Time Constant byte (=01, for 1 byte read).
F8B8 3E7B	LD	A,$7B		; data for CTC1+2 on next 2 lines: (Disable int, Counter Mode, Rising edge, No Time Const. Follows, Software Reset)
					; MEANING: Disable interrupts
F8BA D3EB	OUT	($EB),A		; write 7B to CTC channel 1 (disable CTC1 interrupt)
F8BC D3F3	OUT	($F3),A		; write 7B to CTC channel 2 (disable CTC2 interrupt)
F8BE 3EFF	LD	A,$FF		; control word for CTC3 on next line (Enable Interrupt, Counter Mode, Rising Edge, Time Const. Follows, Reset, Control).
F8C0 D3FB	OUT	($FB),A		; write FF to CTC channel 3: set CTC3 to counter mode and enable CTC3 interrupts
					; MEANING: Reset, Enable Interrupts for Channel 3, a Time Constant follows.
F8C2 3E01	LD	A,$01		; time constant for CTC3 on next line
F8C4 D3FB	OUT	($FB),A	; write 01 to CTC channel 3
				; MEANING: Time Constant byte (=01, for 1 pulse of TRG3, the 20ms interrupt from mainboard).
F8C6 FB		EI
F8C7 18FE	JR	$F8C7		; continuous loop waiting for key press

					; ######## CTC INT. ROUTINE #2 (F8C9) #######
F8C9 CD746F	CALL	$6F74		; call 8272_RD to read & store command result bytes at (FDF0-FDF6)
F8CC CDB66F	CALL	$6FB6		; put 8272 in standby for future commands
F8CF 2108F9	LD	HL,$F908
F8D2 229EFD	LD	($FD9E),HL	; set CTC3 interrupt routine addr to $F908 (see next routine below)
F8D5 21FFFF	LD	HL,$FFFF
F8D8 220AFC	LD	($FC0A),HL
F8DB 3E04	LD	A,$04
F8DD 32086E	LD	($6E08),A
F8E0 AF		XOR	A
F8E1 32076E	LD	($6E07),A
F8E4 1100E0	LD	DE,$E000
F8E7 D5		PUSH	DE
F8E8 210078	LD	HL,$7800
F8EB 010008	LD	BC,$0800
F8EE EDB0	LDIR			; copy CCP (2KB) from $7800-$7FFF to $E000-$E7FF
F8F0 216072	LD	HL,$7260
F8F3 0E06	LD	C,$06
F8F5 EDB0	LDIR			; copy $7260-$7265 to $E800-$E805 ($F9 $16 $00 $00 $00 $1A)
F8F7 210400	LD	HL,$0004
F8FA 4E		LD	C,(HL)		; C = default CP/M physical drv#
F8FB 3A40F6	LD	A,($F640)	; A = 8255/Port C mirror
F8FE E6BF	AND	$BF		; reset bit 6 (06=0 for DRAM#1 access)
F900 3240F6	LD	($F640),A	; save back to 8255/Port C mirror
F903 D3FE	OUT	($FE),A		; send to port C 8255 to get DRAM#1 access
F905 FB		EI
F906 ED4D	RETI
					; ############### CTC3 INTERRUPT ROUTINE #################
F908 ED73CEFD	LD	($FDCE),SP	; save current stack pointer to ($FDCE)
F90C 31CEFD	LD	SP,$FDCE	; set stack at $FDCE
F90F F5		PUSH	AF
F910 C5		PUSH	BC
F911 D5		PUSH	DE
F912 E5		PUSH	HL
F913 3B		DEC	SP
F914 3B		DEC	SP
F915 16FF	LD	D,$FF
F917 214BF6	LD	HL,$F64B
F91A 35		DEC	(HL)		; decrement ($F64B)=$19
F91B 200C	JR	NZ,$F929	; skip if not zero --> ---> --->|
F91D 3619	LD	(HL),$19	; ($F64B)=$19 initially		|
F91F 2B		DEC	HL		; HL=$F64A			|
F920 7E		LD	A,(HL)		; A=($F64A)=$00 initially	|
F921 23		INC	HL		; HL=$F64B			|
F922 B7		OR	A		; test A			|
F923 2804	JR	Z,$F929		; if A=0 skip --> ---> ---> --->|
F925 11D36B	LD	DE,$6BD3	;				|
F928 D5		PUSH	DE		; save $6BD3 on stack		|
F929 23		INC	HL		; <--- <--- <--- <--- <--- <----|
F92A 7E		LD	A,(HL)		; A=($F64C)=$00 initially
F92B B7		OR	A		; test A
F92C 2010	JR	NZ,$F93E	; skip if not zero ---> ---> ---> ---> ---> --->|
F92E 01FE00	LD	BC,$00FE	;						|
F931 ED78	IN	A,(C)		; read port $FE (keyboard)			|
F933 2F		CPL			; invert byte read				|
F934 E63F	AND	$3F		; filter out bits 6 & 7				|
F936 23		INC	HL		; HL=$F64D					|
F937 2014	JR	NZ,$F94D	; if any key was pressed ----> ---> --->|	|
F939 3601	LD	(HL),$01	; ($F64D)=$01				|	|
F93B 23		INC	HL		; HL=$F64E				|	|
F93C 36FF	LD	(HL),$FF	; ($F64E)=$FF				|	|
F93E 14		INC	D		; <--- <--- <--- <--- <--- <--- <--- <--- <-----+
F93F 2015	JR	NZ,$F956	; if D!=0 jump ------> ---> --->|	|	|
F941 D1		POP	DE		;				|	|	|
F942 E1		POP	HL		;				|	|	|
F943 D1		POP	DE		;				|	|	|
F944 C1		POP	BC		;				|	|	|
F945 F1		POP	AF		;				|	|	|
F946 ED7BCEFD	LD	SP,($FDCE)	;				|	|	|
F94A FB		EI			;				|	|	|
F94B ED4D	RETI			;				|	|	|
					;				|	|	|
F94D 35		DEC	(HL)		; < <--- <--- <--- <--- <--- <--- <-----|	|
F94E 20EE	JR	NZ,$F93E	; -----> ---> ---> ---> ---> ---> ---> ---> --->|
F950 3605	LD	(HL),$05	;				|
F952 11266C	LD	DE,$6C26	;				|
F955 D5		PUSH	DE		;				|
F956 3E79	LD	A,$79		; <--- <--- <--- <--- <--- <----|
F958 D3FB	OUT	($FB),A		; disable CTC3 interrupts
F95A 2140F6	LD	HL,$F640
F95D 7E		LD	A,(HL)
F95E 23		INC	HL
F95F 77		LD	(HL),A
F960 2B		DEC	HL
F961 F640	OR	$40		; set bit 6
F963 77		LD	(HL),A
F964 D3FE	OUT	($FE),A		; set DRAM#1 access for CPU
F966 FB		EI
F967 ED4D	RETI

F969 F3		DI
F96A 2141F6	LD	HL,$F641
F96D 3E40	LD	A,$40
F96F A6		AND	(HL)
F970 2B		DEC	HL
F971 CBB6	RES	6,(HL)
F973 B6		OR	(HL)
F974 77		LD	(HL),A
F975 D3FE	OUT	($FE),A
F977 3EF9	LD	A,$F9
F979 D3FB	OUT	($FB),A
F97B E1		POP	HL
F97C D1		POP	DE
F97D C1		POP	BC
F97E F1		POP	AF
F97F ED7BCEFD	LD	SP,($FDCE)
F983 FB		EI
F984 C9		RET

F985 EDA2	INI
F987 FB		EI			; ######## CTC INT. ROUTINE #1 (F987) ####### (this does nothing)
F988 ED4D	RETI

F98A E5		PUSH	HL
F98B 2187F9	LD	HL,$F987
F98E 2298FD	LD	($FD98),HL
F991 215BF6	LD	HL,$F65B
F994 36FF	LD	(HL),$FF
F996 E1		POP	HL
F997 FB		EI
F998 ED4D	RETI

F99A F3		DI
F99B 3A40F6	LD	A,($F640)
F99E E6BF	AND	$BF
F9A0 D3FE	OUT	($FE),A
F9A2 EDB0	LDIR
F9A4 F640	OR	$40
F9A6 D3FE	OUT	($FE),A
F9A8 FB		EI
F9A9 C9		RET

F9AA ED78	IN	A,(C)
F9AC C9		RET

F9AD 76		HALT
F9AE DBF5	IN	A,($F5)
F9B0 E620	AND	$20
F9B2 C2ADF9	JP	NZ,$F9AD
F9B5 C9		RET
					; ############ BIOS #13 UNK #3 #############
F9B6 B7		OR	A
F9B7 3E79	LD	A,$79
F9B9 2802	JR	Z,$F9BD
F9BB 3EF9	LD	A,$F9
F9BD F3		DI
F9BE D3FB	OUT	($FB),A
F9C0 FB		EI
F9C1 C9		RET
					; ############ BIOS #0F LISTST #############
F9C2 3A0300	LD	A,($0003)
F9C5 07		RLCA
F9C6 3EFF	LD	A,$FF
F9C8 D0		RET	NC

F9C9 DBFE	IN	A,($FE)
F9CB E680	AND	$80
F9CD C8		RET	Z

F9CE F6FF	OR	$FF
F9D0 C9		RET
					; ############ BIOS #05 LIST #############
F9D1 3A0300	LD	A,($0003)
F9D4 07		RLCA
F9D5 D228F8	JP	NC,$F828
F9D8 07		RLCA
F9D9 DA12F6	JP	C,$F612
F9DC CDC9F9	CALL	$F9C9		; ############ BIOS #06 PUNCH #############
F9DF 28FB	JR	Z,$F9DC
F9E1 F3		DI
F9E2 3A40F6	LD	A,($F640)
F9E5 E678	AND	$78
F9E7 5F		LD	E,A
F9E8 21CCFA	LD	HL,$FACC
F9EB 46		LD	B,(HL)
F9EC 23		INC	HL
F9ED 3680	LD	(HL),$80
F9EF 23		INC	HL
F9F0 79		LD	A,C
F9F1 2F		CPL
F9F2 0F		RRCA
F9F3 57		LD	D,A
F9F4 E687	AND	$87
F9F6 B3		OR	E
F9F7 77		LD	(HL),A
F9F8 7A		LD	A,D
F9F9 23		INC	HL
F9FA 10F6	DJNZ	$F9F2
F9FC 3600	LD	(HL),$00
F9FE 21CCFA	LD	HL,$FACC
FA01 46		LD	B,(HL)
FA02 04		INC	B
FA03 04		INC	B
FA04 23		INC	HL
FA05 7E		LD	A,(HL)
FA06 D3FE	OUT	($FE),A
FA08 23		INC	HL
FA09 3ACBFA	LD	A,($FACB)
FA0C 4F		LD	C,A
FA0D 110000	LD	DE,$0000
FA10 CD84FA	CALL	$FA84
FA13 10F0	DJNZ	$FA05
FA15 3A40F6	LD	A,($F640)
FA18 D3FE	OUT	($FE),A
FA1A F6FF	OR	$FF
FA1C FB		EI
FA1D C9		RET
					; ############ BIOS #07 READER #############
FA1E CD27FA	CALL	$FA27
FA21 28FB	JR	Z,$FA1E
FA23 3AD8FA	LD	A,($FAD8)
FA26 C9		RET

FA27 F3		DI
FA28 3A40F6	LD	A,($F640)
FA2B CBFF	SET	7,A
FA2D D3FE	OUT	($FE),A
FA2F 0600	LD	B,$00
FA31 DBFE	IN	A,($FE)
FA33 07		RLCA
FA34 DA41FA	JP	C,$FA41
FA37 10F8	DJNZ	$FA31
FA39 3A40F6	LD	A,($F640)
FA3C D3FE	OUT	($FE),A
FA3E AF		XOR	A
FA3F FB		EI
FA40 C9		RET

FA41 21CCFA	LD	HL,$FACC
FA44 46		LD	B,(HL)
FA45 04		INC	B
FA46 04		INC	B
FA47 23		INC	HL
FA48 110000	LD	DE,$0000
FA4B 3ACBFA	LD	A,($FACB)
FA4E 4F		LD	C,A
FA4F DBFE	IN	A,($FE)
FA51 77		LD	(HL),A
FA52 23		INC	HL
FA53 CD84FA	CALL	$FA84
FA56 10F0	DJNZ	$FA48
FA58 3A40F6	LD	A,($F640)
FA5B D3FE	OUT	($FE),A
FA5D E6F8	AND	$F8
FA5F 5F		LD	E,A
FA60 2B		DEC	HL
FA61 CB7E	BIT	7,(HL)
FA63 20D9	JR	NZ,$FA3E
FA65 21CCFA	LD	HL,$FACC
FA68 46		LD	B,(HL)
FA69 23		INC	HL
FA6A CB7E	BIT	7,(HL)
FA6C 28D0	JR	Z,$FA3E
FA6E 0EFF	LD	C,$FF
FA70 23		INC	HL
FA71 7E		LD	A,(HL)
FA72 07		RLCA
FA73 CB19	RR	C
FA75 E607	AND	$07
FA77 B3		OR	E
FA78 D3FE	OUT	($FE),A
FA7A 23		INC	HL
FA7B 10F4	DJNZ	$FA71
FA7D 79		LD	A,C
FA7E 2F		CPL
FA7F 32D8FA	LD	($FAD8),A
FA82 1891	JR	$FA15
FA84 110000	LD	DE,$0000
FA87 110000	LD	DE,$0000
FA8A 110000	LD	DE,$0000
FA8D 110000	LD	DE,$0000
FA90 110000	LD	DE,$0000
FA93 ED57	LD	A,I
FA95 ED57	LD	A,I
FA97 ED57	LD	A,I
FA99 0D		DEC	C
FA9A C284FA	JP	NZ,$FA84
FA9D C9		RET
					; ############ BIOS #14 UNK #4 #############
FA9E 323FF6	LD	($F63F),A
FAA1 47		LD	B,A
FAA2 E607	AND	$07
FAA4 5F		LD	E,A
FAA5 1600	LD	D,$00
FAA7 21BFFA	LD	HL,$FABF
FAAA 19		ADD	HL,DE
FAAB 7E		LD	A,(HL)
FAAC 32CBFA	LD	($FACB),A
FAAF 78		LD	A,B
FAB0 E618	AND	$18
FAB2 0F		RRCA
FAB3 0F		RRCA
FAB4 0F		RRCA
FAB5 5F		LD	E,A
FAB6 21C7FA	LD	HL,$FAC7
FAB9 19		ADD	HL,DE
FABA 7E		LD	A,(HL)
FABB 32CCFA	LD	($FACC),A
FABE C9		RET

FABF FF		DEFB	$FF
FAC0 7F		DEFB	$7F
FAC1 3F		DEFB	$3F
FAC2 1F		DEFB	$1F
FAC3 0F		DEFB	$0F
FAC4 07		DEFB	$07
FAC5 03		DEFB	$03
FAC6 01		DEFB	$01
FAC7 05		DEFB	$05
FAC8 06		DEFB	$06
FAC9 07		DEFB	$07
FACA 08		DEFB	$08
FACB 00		DEFB	$00
FACC 00		DEFB	$00
FACD C3		DEFB	$C3
FACE F4		DEFB	$F4
FACF F5		DEFB	$F5
FAD0 00		DEFB	$00
FAD1 FE		DEFB	$FE
FAD2 89		DEFB	$89
FAD3 20		DEFB	$20
FAD4 05		DEFB	$05
FAD5 3E		DEFB	$3E
FAD6 04		DEFB	$04
FAD7 C3		DEFB	$C3
FAD8 4A		DEFB	$4A
FAD9 F7		DEFB	$F7
FADA 21		DEFB	$21
FADB EF		DEFB	$EF
FADC F5		DEFB	$F5
FADD FE		DEFB	$FE
FADE 83		DEFB	$83
FADF 20		DEFB	$20
FAE0 05		DEFB	$05
FAE1 CB		DEFB	$CB
FAE2 CE		DEFB	$CE
FAE3 C3		DEFB	$C3
FAE4 43		DEFB	$43
FAE5 F7		DEFB	$F7
FAE6 FE		DEFB	$FE
FAE7 8B		DEFB	$8B
FAE8 20		DEFB	$20
FAE9 04		DEFB	$04
FAEA CB		DEFB	$CB
FAEB C6		DEFB	$C6
FAEC 18		DEFB	$18
FAED F3		DEFB	$F3
FAEE FE		DEFB	$FE
FAEF FE		DEFB	$FE
FAF0 20		DEFB	$20
FAF1 F1		DEFB	$F1
FAF2 21		DEFB	$21
FAF3 20		DEFB	$20
FAF4 74		DEFB	$74
FAF5 18		DEFB	$18
FAF6 D6		DEFB	$D6
FAF7 21		DEFB	$21
FAF8 00		DEFB	$00
FAF9 74		DEFB	$74
FAFA 18		DEFB	$18
FAFB D1		DEFB	$D1
FAFC 73		DEFB	$73
FAFD F8		DEFB	$F8
FAFE 00		DEFB	$00
FAFF 00		DEFB	$00
				; ######## DPBASE (FB00) #########
FB00 F9		DEFB	$F9	; (FB00) ----- DPH#0 base addr
FB01 F6		DEFB	$F6	; XLT=F6F9
FB02 00		DEFB	$00	; * BDOS
FB03 00		DEFB	$00	; *
FB04 00		DEFB	$00	; * scratch
FB05 00		DEFB	$00	; * pad
FB06 00		DEFB	$00	; *
FB07 00		DEFB	$00	; * area
FB08 80		DEFB	$80	; \
FB09 FB		DEFB	$FB	; / DIRBUF=FB80
FB0A EA		DEFB	$EA	; \
FB0B F6		DEFB	$F6	; / DPB=F6EA
FB0C 10		DEFB	$10	; \
FB0D FC		DEFB	$FC	; / CSV=FC10
FB0E 90		DEFB	$90	; \
FB0F FC		DEFB	$FC	; / ALV=FC90
FB10 F9		DEFB	$F9	; (FB10) ----- DPH#1 base addr
FB11 F6		DEFB	$F6	; XLT=F6F9
FB12 00		DEFB	$00	; * BDOS
FB13 00		DEFB	$00	; *
FB14 00		DEFB	$00	; * scratch
FB15 00		DEFB	$00	; * pad
FB16 00		DEFB	$00	; *
FB17 00		DEFB	$00	; * area
FB18 80		DEFB	$80	; \
FB19 FB		DEFB	$FB	; / DIRBUF=FB80
FB1A EA		DEFB	$EA	; \
FB1B F6		DEFB	$F6	; / DPB=F6EA
FB1C 20		DEFB	$20	; \
FB1D FC		DEFB	$FC	; / CSV=FC20
FB1E B0		DEFB	$B0	; \
FB1F FC		DEFB	$FC	; / ALV=FCB0
FB20 D9		DEFB	$D9	; (FB20) ----- DPH#2 base addr
FB21 F6		DEFB	$F6	; XLT=F6D9
FB22 00		DEFB	$00	; * BDOS
FB23 00		DEFB	$00	; *
FB24 00		DEFB	$00	; * scratch
FB25 00		DEFB	$00	; * pad
FB26 00		DEFB	$00	; *
FB27 00		DEFB	$00	; * area
FB28 80		DEFB	$80	; \
FB29 FB		DEFB	$FB	; / DIRBUF=FB80
FB2A CA		DEFB	$CA	; \
FB2B F6		DEFB	$F6	; / DPB=F6CA
FB2C 30		DEFB	$30	; \
FB2D FC		DEFB	$FC	; / CSV=FC30
FB2E D0		DEFB	$D0	; \
FB2F FC		DEFB	$FC	; / ALV=FCD0
FB30 D9		DEFB	$D9	; (FB30) ----- DPH#3 base addr
FB31 F6		DEFB	$F6	; XLT=F6D9
FB32 00		DEFB	$00	; * BDOS
FB33 00		DEFB	$00	; *
FB34 00		DEFB	$00	; * scratch
FB35 00		DEFB	$00	; * pad
FB36 00		DEFB	$00	; *
FB37 00		DEFB	$00	; * area
FB38 80		DEFB	$80	; \
FB39 FB		DEFB	$FB	; / DIRBUF=FB80
FB3A CA		DEFB	$CA	; \
FB3B F6		DEFB	$F6	; / DPB=F6CA
FB3C 50		DEFB	$50	; \
FB3D FC		DEFB	$FC	; / CSV=FC50
FB3E 10		DEFB	$10	; \
FB3F FD		DEFB	$FD	; / ALV=FD10
FB40 00		DEFB	$00	; (FB40) ----- DPH#4 base addr
FB41 00		DEFB	$00	; XLT=0000
FB42 00		DEFB	$00	; * BDOS
FB43 00		DEFB	$00	; *
FB44 00		DEFB	$00	; * scratch
FB45 00		DEFB	$00	; * pad
FB46 00		DEFB	$00	; *
FB47 00		DEFB	$00	; * area
FB48 80		DEFB	$80	; \
FB49 FB		DEFB	$FB	; / DIRBUF=FB80
FB4A 00		DEFB	$00	; \
FB4B 00		DEFB	$00	; / DPB=0000
FB4C 70		DEFB	$70	; \
FB4D FC		DEFB	$FC	; / CSV=FC70
FB4E 50		DEFB	$50	; \
FB4F FD		DEFB	$FD	; / ALV=FD50
FB50 77		DEFB	$77	; (FB50) ----- DPH#5 base addr
FB51 F6		DEFB	$F6	; XLT=F677
FB52 00		DEFB	$00	; * BDOS
FB53 00		DEFB	$00	; *
FB54 00		DEFB	$00	; * scratch
FB55 00		DEFB	$00	; * pad
FB56 00		DEFB	$00	; *
FB57 00		DEFB	$00	; * area
FB58 80		DEFB	$80	; \
FB59 FB		DEFB	$FB	; / DIRBUF=FB80
FB5A 68		DEFB	$68	; \
FB5B F6		DEFB	$F6	; / DPB=F668
FB5C 70		DEFB	$70	; \
FB5D FC		DEFB	$FC	; / CSV=FC70
FB5E 50		DEFB	$50	; \
FB5F FD		DEFB	$FD	; / ALV=FD50
FB60 98		DEFB	$98	; (FB60) ----- DPH#6 base addr
FB61 F6		DEFB	$F6	; XLT=F698
FB62 00		DEFB	$00	; * BDOS
FB63 00		DEFB	$00	; *
FB64 00		DEFB	$00	; * scratch
FB65 00		DEFB	$00	; * pad
FB66 00		DEFB	$00	; *
FB67 00		DEFB	$00	; * area
FB68 80		DEFB	$80	; \
FB69 FB		DEFB	$FB	; / DIRBUF=FB80
FB6A 89		DEFB	$89	; \
FB6B F6		DEFB	$F6	; / DPB=F689
FB6C 70		DEFB	$70	; \
FB6D FC		DEFB	$FC	; / CSV=FC70
FB6E 50		DEFB	$50	; \
FB6F FD		DEFB	$FD	; / ALV=FD50
FB70 B8		DEFB	$B8	; (FB70) ----- DPH#7 base addr
FB71 F6		DEFB	$F6	; XLT=F6B8
FB72 00		DEFB	$00	; * BDOS
FB73 00		DEFB	$00	; *
FB74 00		DEFB	$00	; * scratch
FB75 00		DEFB	$00	; * pad
FB76 00		DEFB	$00	; *
FB77 00		DEFB	$00	; * area
FB78 80		DEFB	$80	; \
FB79 FB		DEFB	$FB	; / DIRBUF=FB80
FB7A A9		DEFB	$A9	; \
FB7B F6		DEFB	$F6	; / DPB=F6A9
FB7C 70		DEFB	$70	; \
FB7D FC		DEFB	$FC	; / CSV=FC70
FB7E 50		DEFB	$50	; \
FB7F FD		DEFB	$FD	; / ALV=FD50
				; ####### DPH TABLE END ########
FB80 00		DEFB	$00	; ####### DIRBUF (FB80) #######
FB81 00		DEFB	$00
FB82 00		DEFB	$00
FB83 00		DEFB	$00
FB84 00		DEFB	$00
FB85 00		DEFB	$00
FB86 00		DEFB	$00
FB87 00		DEFB	$00
FB88 00		DEFB	$00
FB89 00		DEFB	$00
FB8A 00		DEFB	$00
FB8B 00		DEFB	$00
FB8C 00		DEFB	$00
FB8D 00		DEFB	$00
FB8E 00		DEFB	$00
FB8F 00		DEFB	$00
FB90 00		DEFB	$00
FB91 00		DEFB	$00
FB92 00		DEFB	$00
FB93 00		DEFB	$00
FB94 00		DEFB	$00
FB95 00		DEFB	$00
FB96 00		DEFB	$00
FB97 00		DEFB	$00
FB98 00		DEFB	$00
FB99 00		DEFB	$00
FB9A 00		DEFB	$00
FB9B 00		DEFB	$00
FB9C 00		DEFB	$00
FB9D 00		DEFB	$00
FB9E 00		DEFB	$00
FB9F 00		DEFB	$00
FBA0 00		DEFB	$00
FBA1 00		DEFB	$00
FBA2 00		DEFB	$00
FBA3 00		DEFB	$00
FBA4 00		DEFB	$00
FBA5 00		DEFB	$00
FBA6 00		DEFB	$00
FBA7 00		DEFB	$00
FBA8 00		DEFB	$00
FBA9 00		DEFB	$00
FBAA 00		DEFB	$00
FBAB 00		DEFB	$00
FBAC 00		DEFB	$00
FBAD 00		DEFB	$00
FBAE 00		DEFB	$00
FBAF 00		DEFB	$00
FBB0 00		DEFB	$00
FBB1 00		DEFB	$00
FBB2 00		DEFB	$00
FBB3 00		DEFB	$00
FBB4 00		DEFB	$00
FBB5 00		DEFB	$00
FBB6 00		DEFB	$00
FBB7 00		DEFB	$00
FBB8 00		DEFB	$00
FBB9 00		DEFB	$00
FBBA 00		DEFB	$00
FBBB 00		DEFB	$00
FBBC 00		DEFB	$00
FBBD 00		DEFB	$00
FBBE 00		DEFB	$00
FBBF 00		DEFB	$00
FBC0 00		DEFB	$00
FBC1 00		DEFB	$00
FBC2 00		DEFB	$00
FBC3 00		DEFB	$00
FBC4 00		DEFB	$00
FBC5 00		DEFB	$00
FBC6 00		DEFB	$00
FBC7 00		DEFB	$00
FBC8 00		DEFB	$00
FBC9 00		DEFB	$00
FBCA 00		DEFB	$00
FBCB 00		DEFB	$00
FBCC 00		DEFB	$00
FBCD 00		DEFB	$00
FBCE 00		DEFB	$00
FBCF 00		DEFB	$00
FBD0 00		DEFB	$00
FBD1 00		DEFB	$00
FBD2 00		DEFB	$00
FBD3 00		DEFB	$00
FBD4 00		DEFB	$00
FBD5 00		DEFB	$00
FBD6 00		DEFB	$00
FBD7 00		DEFB	$00
FBD8 00		DEFB	$00
FBD9 00		DEFB	$00
FBDA 00		DEFB	$00
FBDB 00		DEFB	$00
FBDC 00		DEFB	$00
FBDD 00		DEFB	$00
FBDE 00		DEFB	$00
FBDF 00		DEFB	$00
FBE0 00		DEFB	$00
FBE1 00		DEFB	$00
FBE2 00		DEFB	$00
FBE3 00		DEFB	$00
FBE4 00		DEFB	$00
FBE5 00		DEFB	$00
FBE6 00		DEFB	$00
FBE7 00		DEFB	$00
FBE8 00		DEFB	$00
FBE9 00		DEFB	$00
FBEA 00		DEFB	$00
FBEB 00		DEFB	$00
FBEC 00		DEFB	$00
FBED 00		DEFB	$00
FBEE 00		DEFB	$00
FBEF 00		DEFB	$00
FBF0 00		DEFB	$00
FBF1 00		DEFB	$00
FBF2 00		DEFB	$00
FBF3 00		DEFB	$00
FBF4 00		DEFB	$00
FBF5 00		DEFB	$00
FBF6 00		DEFB	$00
FBF7 00		DEFB	$00
FBF8 00		DEFB	$00
FBF9 00		DEFB	$00
FBFA 00		DEFB	$00
FBFB 00		DEFB	$00
FBFC 00		DEFB	$00
FBFD 00		DEFB	$00
FBFE 00		DEFB	$00
FBFF 00		DEFB	$00	; ######## DIRBUF END ########

FC00 00		DEFB	$00	; (FC00) physical number for drive A:
FC01 01		DEFB	$01	; (FC01) physical number for drive B:
FC02 02		DEFB	$02	; (FC02) physical number for drive C:
FC03 03		DEFB	$03	; (FC03) physical number for drive D:
FC04 00		DEFB	$00	; (FC04) physical number for drive E:
FC05 00		DEFB	$00	; (FC05) physical number for drive F:
FC06 00		DEFB	$00	; (FC06) physical number for drive G:
FC07 3A		DEFB	$3A	; (FC07) physical number for drive H:
FC08 FF		DEFB	$FF
FC09 FF		DEFB	$FF
FC0A FF		DEFB	$FF
FC0B FF		DEFB	$FF
FC0C 00		DEFB	$00
FC0D 00		DEFB	$00
FC0E 00		DEFB	$00
FC0F 00		DEFB	$00
				; ########## CSV #0 ###########
FC10 00		DEFB	$00
FC11 00		DEFB	$00
FC12 00		DEFB	$00
FC13 00		DEFB	$00
FC14 00		DEFB	$00
FC15 00		DEFB	$00
FC16 00		DEFB	$00
FC17 00		DEFB	$00
FC18 00		DEFB	$00
FC19 00		DEFB	$00
FC1A 00		DEFB	$00
FC1B 00		DEFB	$00
FC1C 00		DEFB	$00
FC1D 00		DEFB	$00
FC1E 00		DEFB	$00
FC1F 00		DEFB	$00
				; ########## CSV #1 ###########
FC20 00		DEFB	$00
FC21 00		DEFB	$00
FC22 00		DEFB	$00
FC23 00		DEFB	$00
FC24 00		DEFB	$00
FC25 00		DEFB	$00
FC26 00		DEFB	$00
FC27 00		DEFB	$00
FC28 00		DEFB	$00
FC29 00		DEFB	$00
FC2A 00		DEFB	$00
FC2B 00		DEFB	$00
FC2C 00		DEFB	$00
FC2D 00		DEFB	$00
FC2E 00		DEFB	$00
FC2F 00		DEFB	$00
				; ########## CSV #2 ###########
FC30 00		DEFB	$00
FC31 00		DEFB	$00
FC32 00		DEFB	$00
FC33 00		DEFB	$00
FC34 00		DEFB	$00
FC35 00		DEFB	$00
FC36 00		DEFB	$00
FC37 00		DEFB	$00
FC38 00		DEFB	$00
FC39 00		DEFB	$00
FC3A 00		DEFB	$00
FC3B 00		DEFB	$00
FC3C 00		DEFB	$00
FC3D 00		DEFB	$00
FC3E 00		DEFB	$00
FC3F 00		DEFB	$00
FC40 00		DEFB	$00
FC41 00		DEFB	$00
FC42 00		DEFB	$00
FC43 00		DEFB	$00
FC44 00		DEFB	$00
FC45 00		DEFB	$00
FC46 00		DEFB	$00
FC47 00		DEFB	$00
FC48 00		DEFB	$00
FC49 00		DEFB	$00
FC4A 00		DEFB	$00
FC4B 00		DEFB	$00
FC4C 00		DEFB	$00
FC4D 00		DEFB	$00
FC4E 00		DEFB	$00
FC4F 00		DEFB	$00
				; ########## CSV #3 ###########
FC50 00		DEFB	$00
FC51 00		DEFB	$00
FC52 00		DEFB	$00
FC53 00		DEFB	$00
FC54 00		DEFB	$00
FC55 00		DEFB	$00
FC56 00		DEFB	$00
FC57 00		DEFB	$00
FC58 00		DEFB	$00
FC59 00		DEFB	$00
FC5A 00		DEFB	$00
FC5B 00		DEFB	$00
FC5C 00		DEFB	$00
FC5D 00		DEFB	$00
FC5E 00		DEFB	$00
FC5F 00		DEFB	$00
FC60 00		DEFB	$00
FC61 00		DEFB	$00
FC62 00		DEFB	$00
FC63 00		DEFB	$00
FC64 00		DEFB	$00
FC65 00		DEFB	$00
FC66 00		DEFB	$00
FC67 00		DEFB	$00
FC68 00		DEFB	$00
FC69 00		DEFB	$00
FC6A 00		DEFB	$00
FC6B 00		DEFB	$00
FC6C 00		DEFB	$00
FC6D 00		DEFB	$00
FC6E 00		DEFB	$00
FC6F 00		DEFB	$00
				; ########## CSV #4-#7 ###########
FC70 00		DEFB	$00
FC71 00		DEFB	$00
FC72 00		DEFB	$00
FC73 00		DEFB	$00
FC74 00		DEFB	$00
FC75 00		DEFB	$00
FC76 00		DEFB	$00
FC77 00		DEFB	$00
FC78 00		DEFB	$00
FC79 00		DEFB	$00
FC7A 00		DEFB	$00
FC7B 00		DEFB	$00
FC7C 00		DEFB	$00
FC7D 00		DEFB	$00
FC7E 00		DEFB	$00
FC7F 00		DEFB	$00
FC80 00		DEFB	$00
FC81 00		DEFB	$00
FC82 00		DEFB	$00
FC83 00		DEFB	$00
FC84 00		DEFB	$00
FC85 00		DEFB	$00
FC86 00		DEFB	$00
FC87 00		DEFB	$00
FC88 00		DEFB	$00
FC89 00		DEFB	$00
FC8A 00		DEFB	$00
FC8B 00		DEFB	$00
FC8C 00		DEFB	$00
FC8D 00		DEFB	$00
FC8E 00		DEFB	$00
FC8F 00		DEFB	$00
				; ########## ALV #0 ###########
FC90 00		DEFB	$00
FC91 00		DEFB	$00
FC92 00		DEFB	$00
FC93 00		DEFB	$00
FC94 00		DEFB	$00
FC95 00		DEFB	$00
FC96 00		DEFB	$00
FC97 00		DEFB	$00
FC98 00		DEFB	$00
FC99 00		DEFB	$00
FC9A 00		DEFB	$00
FC9B 00		DEFB	$00
FC9C 00		DEFB	$00
FC9D 00		DEFB	$00
FC9E 00		DEFB	$00
FC9F 00		DEFB	$00
FCA0 00		DEFB	$00
FCA1 00		DEFB	$00
FCA2 00		DEFB	$00
FCA3 00		DEFB	$00
FCA4 00		DEFB	$00
FCA5 00		DEFB	$00
FCA6 00		DEFB	$00
FCA7 00		DEFB	$00
FCA8 00		DEFB	$00
FCA9 00		DEFB	$00
FCAA 00		DEFB	$00
FCAB 00		DEFB	$00
FCAC 00		DEFB	$00
FCAD 00		DEFB	$00
FCAE 00		DEFB	$00
FCAF 00		DEFB	$00
				; ########## ALV #1 ###########
FCB0 00		DEFB	$00
FCB1 00		DEFB	$00
FCB2 00		DEFB	$00
FCB3 00		DEFB	$00
FCB4 00		DEFB	$00
FCB5 00		DEFB	$00
FCB6 00		DEFB	$00
FCB7 00		DEFB	$00
FCB8 00		DEFB	$00
FCB9 00		DEFB	$00
FCBA 00		DEFB	$00
FCBB 00		DEFB	$00
FCBC 00		DEFB	$00
FCBD 00		DEFB	$00
FCBE 00		DEFB	$00
FCBF 00		DEFB	$00
FCC0 00		DEFB	$00
FCC1 00		DEFB	$00
FCC2 00		DEFB	$00
FCC3 00		DEFB	$00
FCC4 00		DEFB	$00
FCC5 00		DEFB	$00
FCC6 00		DEFB	$00
FCC7 00		DEFB	$00
FCC8 00		DEFB	$00
FCC9 00		DEFB	$00
FCCA 00		DEFB	$00
FCCB 00		DEFB	$00
FCCC 00		DEFB	$00
FCCD 00		DEFB	$00
FCCE 00		DEFB	$00
FCCF 00		DEFB	$00
				; ########## ALV #2 ###########
FCD0 00		DEFB	$00
FCD1 00		DEFB	$00
FCD2 00		DEFB	$00
FCD3 00		DEFB	$00
FCD4 00		DEFB	$00
FCD5 00		DEFB	$00
FCD6 00		DEFB	$00
FCD7 00		DEFB	$00
FCD8 00		DEFB	$00
FCD9 00		DEFB	$00
FCDA 00		DEFB	$00
FCDB 00		DEFB	$00
FCDC 00		DEFB	$00
FCDD 00		DEFB	$00
FCDE 00		DEFB	$00
FCDF 00		DEFB	$00
FCE0 00		DEFB	$00
FCE1 00		DEFB	$00
FCE2 00		DEFB	$00
FCE3 00		DEFB	$00
FCE4 00		DEFB	$00
FCE5 00		DEFB	$00
FCE6 00		DEFB	$00
FCE7 00		DEFB	$00
FCE8 00		DEFB	$00
FCE9 00		DEFB	$00
FCEA 00		DEFB	$00
FCEB 00		DEFB	$00
FCEC 00		DEFB	$00
FCED 00		DEFB	$00
FCEE 00		DEFB	$00
FCEF 00		DEFB	$00
FCF0 00		DEFB	$00
FCF1 00		DEFB	$00
FCF2 00		DEFB	$00
FCF3 00		DEFB	$00
FCF4 00		DEFB	$00
FCF5 00		DEFB	$00
FCF6 00		DEFB	$00
FCF7 00		DEFB	$00
FCF8 00		DEFB	$00
FCF9 00		DEFB	$00
FCFA 00		DEFB	$00
FCFB 00		DEFB	$00
FCFC 00		DEFB	$00
FCFD 00		DEFB	$00
FCFE 00		DEFB	$00
FCFF 00		DEFB	$00
FD00 00		DEFB	$00
FD01 00		DEFB	$00
FD02 00		DEFB	$00
FD03 00		DEFB	$00
FD04 00		DEFB	$00
FD05 00		DEFB	$00
FD06 00		DEFB	$00
FD07 00		DEFB	$00
FD08 00		DEFB	$00
FD09 00		DEFB	$00
FD0A 00		DEFB	$00
FD0B 00		DEFB	$00
FD0C 00		DEFB	$00
FD0D 00		DEFB	$00
FD0E 00		DEFB	$00
FD0F 00		DEFB	$00
				; ########## ALV #3 ###########
FD10 00		DEFB	$00
FD11 00		DEFB	$00
FD12 00		DEFB	$00
FD13 00		DEFB	$00
FD14 00		DEFB	$00
FD15 00		DEFB	$00
FD16 00		DEFB	$00
FD17 00		DEFB	$00
FD18 00		DEFB	$00
FD19 00		DEFB	$00
FD1A 00		DEFB	$00
FD1B 00		DEFB	$00
FD1C 00		DEFB	$00
FD1D 00		DEFB	$00
FD1E 00		DEFB	$00
FD1F 00		DEFB	$00
FD20 00		DEFB	$00
FD21 00		DEFB	$00
FD22 00		DEFB	$00
FD23 00		DEFB	$00
FD24 00		DEFB	$00
FD25 00		DEFB	$00
FD26 00		DEFB	$00
FD27 00		DEFB	$00
FD28 00		DEFB	$00
FD29 00		DEFB	$00
FD2A 00		DEFB	$00
FD2B 00		DEFB	$00
FD2C 00		DEFB	$00
FD2D 00		DEFB	$00
FD2E 00		DEFB	$00
FD2F 00		DEFB	$00
FD30 00		DEFB	$00
FD31 00		DEFB	$00
FD32 00		DEFB	$00
FD33 00		DEFB	$00
FD34 00		DEFB	$00
FD35 00		DEFB	$00
FD36 00		DEFB	$00
FD37 00		DEFB	$00
FD38 00		DEFB	$00
FD39 00		DEFB	$00
FD3A 00		DEFB	$00
FD3B 00		DEFB	$00
FD3C 00		DEFB	$00
FD3D 00		DEFB	$00
FD3E 00		DEFB	$00
FD3F 00		DEFB	$00
FD40 00		DEFB	$00
FD41 00		DEFB	$00
FD42 00		DEFB	$00
FD43 00		DEFB	$00
FD44 00		DEFB	$00
FD45 00		DEFB	$00
FD46 00		DEFB	$00
FD47 00		DEFB	$00
FD48 00		DEFB	$00
FD49 00		DEFB	$00
FD4A 00		DEFB	$00
FD4B 00		DEFB	$00
FD4C 00		DEFB	$00
FD4D 00		DEFB	$00
FD4E 00		DEFB	$00
FD4F 00		DEFB	$00
				; ########## ALV #4-#7 ###########
FD50 00		DEFB	$00
FD51 00		DEFB	$00
FD52 00		DEFB	$00
FD53 00		DEFB	$00
FD54 00		DEFB	$00
FD55 00		DEFB	$00
FD56 00		DEFB	$00
FD57 00		DEFB	$00
FD58 00		DEFB	$00
FD59 00		DEFB	$00
FD5A 00		DEFB	$00
FD5B 00		DEFB	$00
FD5C 00		DEFB	$00
FD5D 00		DEFB	$00
FD5E 00		DEFB	$00
FD5F 00		DEFB	$00
FD60 00		DEFB	$00
FD61 00		DEFB	$00
FD62 00		DEFB	$00
FD63 00		DEFB	$00
FD64 00		DEFB	$00
FD65 00		DEFB	$00
FD66 00		DEFB	$00
FD67 00		DEFB	$00
FD68 00		DEFB	$00
FD69 00		DEFB	$00
FD6A 00		DEFB	$00
FD6B 00		DEFB	$00
FD6C 00		DEFB	$00
FD6D 00		DEFB	$00
FD6E 00		DEFB	$00
FD6F 00		DEFB	$00
FD70 00		DEFB	$00
FD71 00		DEFB	$00
FD72 00		DEFB	$00
FD73 00		DEFB	$00
FD74 00		DEFB	$00
FD75 00		DEFB	$00
FD76 00		DEFB	$00
FD77 00		DEFB	$00
FD78 00		DEFB	$00
FD79 00		DEFB	$00
FD7A 00		DEFB	$00
FD7B 00		DEFB	$00
FD7C 00		DEFB	$00
FD7D 00		DEFB	$00
FD7E 00		DEFB	$00
FD7F 00		DEFB	$00
FD80 00		DEFB	$00
FD81 00		DEFB	$00
FD82 00		DEFB	$00
FD83 00		DEFB	$00
FD84 00		DEFB	$00
FD85 00		DEFB	$00
FD86 00		DEFB	$00
FD87 00		DEFB	$00
FD88 00		DEFB	$00
FD89 00		DEFB	$00
FD8A 00		DEFB	$00
FD8B 00		DEFB	$00
FD8C 00		DEFB	$00
FD8D 00		DEFB	$00
FD8E 00		DEFB	$00
FD8F 00		DEFB	$00
				; ############### Backup CTC interrupt table (FD90) ###############
FD90 87		DEFB	$87	; int. vector for CTC-0
FD91 F9		DEFB	$F9	; ($F987)
FD92 87		DEFB	$87	; int. vector for CTC-1
FD93 F9		DEFB	$F9	; ($F987)
FD94 87		DEFB	$87	; int. vector for CTC-2
FD95 F9		DEFB	$F9	; ($F987)
FD96 C9		DEFB	$C9	; int. vector for CTC-3
FD97 F8		DEFB	$F8	; ($F8C9)
				; ############### CTC interrupt table (FD98) ###############
FD98 87		DEFB	$87	; int. vector for CTC-0
FD99 F9		DEFB	$F9	; ($F987)
FD9A 87		DEFB	$87	; int. vector for CTC-1
FD9B F9		DEFB	$F9	; ($F987)
FD9C 87		DEFB	$87	; int. vector for CTC-2
FD9D F9		DEFB	$F9	; ($F987)
FD9E 87		DEFB	$87	; int. vector for CTC-3
FD9F F9		DEFB	$F9	; ($F987)
				; ########## CSV #1 MOVED FOR ALL DRIVES DD ###########
FDA0 00		DEFB	$00
FDA1 00		DEFB	$00
FDA2 00		DEFB	$00
FDA3 00		DEFB	$00
FDA4 00		DEFB	$00
FDA5 00		DEFB	$00
FDA6 00		DEFB	$00
FDA7 00		DEFB	$00
FDA8 00		DEFB	$00
FDA9 00		DEFB	$00
FDAA 00		DEFB	$00
FDAB 00		DEFB	$00
FDAC 00		DEFB	$00
FDAD 00		DEFB	$00
FDAE 00		DEFB	$00
FDAF 00		DEFB	$00
FDB0 00		DEFB	$00
FDB1 00		DEFB	$00
FDB2 00		DEFB	$00
FDB3 00		DEFB	$00
FDB4 00		DEFB	$00
FDB5 00		DEFB	$00
FDB6 00		DEFB	$00
FDB7 00		DEFB	$00
FDB8 00		DEFB	$00
FDB9 00		DEFB	$00
FDBA 00		DEFB	$00
FDBB 00		DEFB	$00
FDBC 00		DEFB	$00
FDBD 00		DEFB	$00
FDBE 00		DEFB	$00
FDBF 00		DEFB	$00
				; ########## ALV #1 MOVED FOR ALL DRIVES DD ###########
FDC0 00		DEFB	$00
FDC1 00		DEFB	$00
FDC2 00		DEFB	$00
FDC3 00		DEFB	$00
FDC4 69		DEFB	$69
FDC5 F9		DEFB	$F9
FDC6 00		DEFB	$00
FDC7 00		DEFB	$00
FDC8 00		DEFB	$00
FDC9 00		DEFB	$00
FDCA 00		DEFB	$00
FDCB 00		DEFB	$00
FDCC 00		DEFB	$00
FDCD 00		DEFB	$00
FDCE 00		DEFB	$00
FDCF 00		DEFB	$00
FDD0 00		DEFB	$00
FDD1 00		DEFB	$00
FDD2 00		DEFB	$00
FDD3 00		DEFB	$00
FDD4 00		DEFB	$00
FDD5 00		DEFB	$00
FDD6 00		DEFB	$00
FDD7 00		DEFB	$00
FDD8 00		DEFB	$00
FDD9 00		DEFB	$00
FDDA 00		DEFB	$00
FDDB 00		DEFB	$00
FDDC 00		DEFB	$00
FDDD 00		DEFB	$00
FDDE 00		DEFB	$00
FDDF 00		DEFB	$00
FDE0 00		DEFB	$00
FDE1 00		DEFB	$00
FDE2 00		DEFB	$00
FDE3 00		DEFB	$00
FDE4 00		DEFB	$00
FDE5 00		DEFB	$00
FDE6 00		DEFB	$00
FDE7 00		DEFB	$00
FDE8 00		DEFB	$00
FDE9 00		DEFB	$00
FDEA 00		DEFB	$00
FDEB 00		DEFB	$00
FDEC 00		DEFB	$00
FDED 00		DEFB	$00
FDEE 00		DEFB	$00
FDEF 00		DEFB	$00
FDF0 00		DEFB	$00
FDF1 00		DEFB	$00
FDF2 00		DEFB	$00
FDF3 00		DEFB	$00
FDF4 00		DEFB	$00
FDF5 00		DEFB	$00
FDF6 00		DEFB	$00
FDF7 00		DEFB	$00
FDF8 00		DEFB	$00
FDF9 00		DEFB	$00
FDFA 00		DEFB	$00
FDFB 00		DEFB	$00
FDFC 00		DEFB	$00
FDFD 00		DEFB	$00
FDFE 00		DEFB	$00
FDFF 00		DEFB	$00

FE00 1B		DEFB	$1B	; ESC \ control sequence to erase screen
FE01 30		DEFB	$30	; '0' / and position cursor top left
FE02 0E		DEFB	$0E	; control char to activate inverse video
FE03 53		DEFB	$53	; 'S'
FE04 59		DEFB	$59	; 'Y'
FE05 53		DEFB	$53	; 'S'
FE06 20		DEFB	$20	; ' '
FE07 38		DEFB	$38	; '8'
FE08 36		DEFB	$36	; '6'
FE09 30		DEFB	$30	; '0'
FE0A 20		DEFB	$20	; ' '
FE0B 4B		DEFB	$4B	; 'K'
FE0C 6F		DEFB	$6F	; 'o'
FE0D 20		DEFB	$20	; ' '
FE0E 2F		DEFB	$2F	; '/'
FE0F 20		DEFB	$20	; ' '
FE10 37		DEFB	$37	; '7'
FE11 37		DEFB	$37	; '7'
FE12 34		DEFB	$34	; '4'
FE13 20		DEFB	$20	; ' '
FE14 4B		DEFB	$4B	; 'K'
FE15 6F		DEFB	$6F	; 'o'
FE16 20		DEFB	$20	; ' '
FE17 FF		DEFB	$FF
FE18 20		DEFB	$20	; ' '
FE19 31		DEFB	$31	; '1'
FE1A 39		DEFB	$39	; '9'
FE1B 39		DEFB	$39	; '9'
FE1C 33		DEFB	$33	; '3'
FE1D 20		DEFB	$20	; ' '
FE1E 0F		DEFB	$0F	; control char to activate normal video
FE1F 00		DEFB	$00
FE20 00		DEFB	$00
FE21 00		DEFB	$00
FE22 00		DEFB	$00
FE23 00		DEFB	$00
FE24 00		DEFB	$00
FE25 00		DEFB	$00
FE26 00		DEFB	$00
FE27 00		DEFB	$00
FE28 00		DEFB	$00
FE29 00		DEFB	$00

FE2A C39A70	JP	$709A
					; ############ BIOS #00 BOOT #############
FE2D ED5E	IM	2
FE2F 3EFD	LD	A,$FD		; upper half of CTC interrupt table start address (FD)...
FE31 ED47	LD	I,A		; ...is stored in register I (see Z80 docs)
FE33 3E98	LD	A,$98		; lower half of CTC interrupt table start address (98)...
FE35 D3E3	OUT	($E3),A		; ...is sent to CTC channel 0
					; MEANING: Interrupt Vector being used by all 4 channels!!
					; Interrupt Vector = 10011cc0 where cc is the CTC channel.
					; requesting the interrupt. So vector for CTC0 = 98, CTC1 = 9A, CTC2 = 9C, CTC3 = 9E
					; The upper half of addr table pointer is FD (stored in register I above).
					; So the vector table is at FD98 (CTC0), FD9A (CTC1), FD9C (CTC2), FD9E (CTC3).
					; At start all channels use Interrupt routine at $F987 which does nothing
FE37 3EFF	LD	A,$FF		; data for CTC0 on next line: set CTC0 to counter mode and enable CTC0 interrupts
FE39 D3E3	OUT	($E3),A		; write FF to CTC channel 0 (Enable Interrupt, Counter Mode, Prescaler=256,
					; Rising Edge, CLK/TRG Pulse Starts Timer, Time Const. Follows, Reset, Control).
					; MEANING: Reset, Enable Interrupts for Channel 0, a Time Constant follows.
FE3B 3E01	LD	A,$01		; time constant for CTC0 on next line: generate INT for each byte transferred from 8272 to µP
FE3D D3E3	OUT	($E3),A		; write 01 to CTC channel 0
					; MEANING: Time Constant byte (=01, for 1 byte read).
FE3F 3E7B	LD	A,$7B		; control word for CTC channels 1-3 in next 3 instructions (Disable Interrupt, Counter Mode, Prescaler=256, Rising Edge, Pulse Trigger, No Time Const. Follows, Reset, Control)
FE41 D3EB	OUT	($EB),A		; write 7B to CTC channel 1
					; MEANING: Disable Channel 1 interrupts, reset channel.
FE43 D3F3	OUT	($F3),A		; write 7B to CTC channel 2
					; MEANING: Disable Channel 2 interrupts, reset channel.
FE45 D3FB	OUT	($FB),A		; write 7B to CTC channel 3
					; MEANING: Disable Channel 3 interrupts, reset channel.
FE47 013072	LD	BC,$7230
FE4A 1173F8	LD	DE,$F873
FE4D 2101F6	LD	HL,$F601
FE50 73		LD	(HL),E		; ($F601) = $73
FE51 23		INC	HL		; HL = $F602
FE52 72		LD	(HL),D		; ($F602) = $F8 -> this changes the address of BIOS function 00 (BOOT) to $F873 = CPM_TO_COBRA
FE53 23		INC	HL		; HL = $F603...
FE54 E5		PUSH	HL		; ...saved on stack (RET will go to BIOS WBOOT)
FE55 C5		PUSH	BC		; BC = $7230 also saved on stack (RET will jump to $7230)
FE56 3A40F6	LD	A,($F640)	; A = 8255/Port C mirror (initial value $40 with O6=1 -> VRAM CPU access)
FE59 D3FE	OUT	($FE),A		; set access to VRAM instead of DRAM#1
FE5B C37170	JP	$7071		; jump to BLOCK#1

FE5E 00		DEFB	$00
FE5F 00		DEFB	$00
FE60 00		DEFB	$00
FE61 00		DEFB	$00
FE62 00		DEFB	$00
FE63 00		DEFB	$00
FE64 00		DEFB	$00
FE65 00		DEFB	$00
FE66 00		DEFB	$00
FE67 00		DEFB	$00
FE68 00		DEFB	$00
FE69 00		DEFB	$00
FE6A 00		DEFB	$00
FE6B 00		DEFB	$00
FE6C 00		DEFB	$00
FE6D 00		DEFB	$00
FE6E 00		DEFB	$00
FE6F 00		DEFB	$00
FE70 00		DEFB	$00
FE71 00		DEFB	$00
FE72 00		DEFB	$00
FE73 00		DEFB	$00
FE74 00		DEFB	$00
FE75 00		DEFB	$00
FE76 00		DEFB	$00
FE77 00		DEFB	$00
FE78 00		DEFB	$00
FE79 00		DEFB	$00
FE7A 00		DEFB	$00
FE7B 00		DEFB	$00
FE7C 00		DEFB	$00
FE7D 00		DEFB	$00
FE7E 00		DEFB	$00
FE7F 00		DEFB	$00
FE80 00		DEFB	$00
FE81 00		DEFB	$00
FE82 00		DEFB	$00
FE83 00		DEFB	$00
FE84 00		DEFB	$00
FE85 00		DEFB	$00
FE86 00		DEFB	$00
FE87 00		DEFB	$00
FE88 00		DEFB	$00
FE89 00		DEFB	$00
FE8A 00		DEFB	$00
FE8B 00		DEFB	$00
FE8C 00		DEFB	$00
FE8D 00		DEFB	$00
FE8E 00		DEFB	$00
FE8F 00		DEFB	$00
FE90 00		DEFB	$00
FE91 00		DEFB	$00
FE92 00		DEFB	$00
FE93 00		DEFB	$00
FE94 00		DEFB	$00
FE95 00		DEFB	$00
FE96 00		DEFB	$00
FE97 00		DEFB	$00
FE98 00		DEFB	$00
FE99 00		DEFB	$00
FE9A 00		DEFB	$00
FE9B 00		DEFB	$00
FE9C 00		DEFB	$00
FE9D 00		DEFB	$00
FE9E 00		DEFB	$00
FE9F 00		DEFB	$00
FEA0 00		DEFB	$00
FEA1 00		DEFB	$00
FEA2 00		DEFB	$00
FEA3 00		DEFB	$00
FEA4 00		DEFB	$00
FEA5 00		DEFB	$00
FEA6 00		DEFB	$00
FEA7 00		DEFB	$00
FEA8 00		DEFB	$00
FEA9 00		DEFB	$00
FEAA 00		DEFB	$00
FEAB 00		DEFB	$00
FEAC 00		DEFB	$00
FEAD 00		DEFB	$00
FEAE 00		DEFB	$00
FEAF 00		DEFB	$00
FEB0 00		DEFB	$00
FEB1 00		DEFB	$00
FEB2 00		DEFB	$00
FEB3 00		DEFB	$00
FEB4 00		DEFB	$00
FEB5 00		DEFB	$00
FEB6 00		DEFB	$00
FEB7 00		DEFB	$00
FEB8 00		DEFB	$00
FEB9 00		DEFB	$00
FEBA 00		DEFB	$00
FEBB 00		DEFB	$00
FEBC 00		DEFB	$00
FEBD 00		DEFB	$00
FEBE 00		DEFB	$00
FEBF 00		DEFB	$00
FEC0 00		DEFB	$00
FEC1 00		DEFB	$00
FEC2 00		DEFB	$00
FEC3 00		DEFB	$00
FEC4 00		DEFB	$00
FEC5 00		DEFB	$00
FEC6 00		DEFB	$00
FEC7 00		DEFB	$00
FEC8 00		DEFB	$00
FEC9 00		DEFB	$00
FECA 00		DEFB	$00
FECB 00		DEFB	$00
FECC 00		DEFB	$00
FECD 00		DEFB	$00
FECE 00		DEFB	$00
FECF 00		DEFB	$00
FED0 00		DEFB	$00
FED1 00		DEFB	$00
FED2 00		DEFB	$00
FED3 00		DEFB	$00
FED4 00		DEFB	$00
FED5 00		DEFB	$00
FED6 00		DEFB	$00
FED7 00		DEFB	$00
FED8 00		DEFB	$00
FED9 00		DEFB	$00
FEDA 00		DEFB	$00
FEDB 00		DEFB	$00
FEDC 00		DEFB	$00
FEDD 00		DEFB	$00
FEDE 00		DEFB	$00
FEDF 00		DEFB	$00
FEE0 00		DEFB	$00
FEE1 00		DEFB	$00
FEE2 00		DEFB	$00
FEE3 00		DEFB	$00
FEE4 00		DEFB	$00
FEE5 00		DEFB	$00
FEE6 00		DEFB	$00
FEE7 00		DEFB	$00
FEE8 00		DEFB	$00
FEE9 00		DEFB	$00
FEEA 00		DEFB	$00
FEEB 00		DEFB	$00
FEEC 00		DEFB	$00
FEED 00		DEFB	$00
FEEE 00		DEFB	$00
FEEF 00		DEFB	$00
FEF0 00		DEFB	$00
FEF1 00		DEFB	$00
FEF2 00		DEFB	$00
FEF3 00		DEFB	$00
FEF4 00		DEFB	$00
FEF5 00		DEFB	$00
FEF6 00		DEFB	$00
FEF7 00		DEFB	$00
FEF8 00		DEFB	$00
FEF9 00		DEFB	$00
FEFA 00		DEFB	$00
FEFB 00		DEFB	$00
FEFC 00		DEFB	$00
FEFD 00		DEFB	$00
FEFE 00		DEFB	$00
FEFF 00		DEFB	$00
FF00 00		DEFB	$00
FF01 00		DEFB	$00
FF02 00		DEFB	$00
FF03 00		DEFB	$00
FF04 00		DEFB	$00
FF05 00		DEFB	$00
FF06 00		DEFB	$00
FF07 00		DEFB	$00
FF08 00		DEFB	$00
FF09 00		DEFB	$00
FF0A 00		DEFB	$00
FF0B 00		DEFB	$00
FF0C 00		DEFB	$00
FF0D 00		DEFB	$00
FF0E 00		DEFB	$00
FF0F 00		DEFB	$00
FF10 00		DEFB	$00
FF11 00		DEFB	$00
FF12 00		DEFB	$00
FF13 00		DEFB	$00
FF14 00		DEFB	$00
FF15 00		DEFB	$00
FF16 00		DEFB	$00
FF17 00		DEFB	$00
FF18 00		DEFB	$00
FF19 00		DEFB	$00
FF1A 00		DEFB	$00
FF1B 00		DEFB	$00
FF1C 00		DEFB	$00
FF1D 00		DEFB	$00
FF1E 00		DEFB	$00
FF1F 00		DEFB	$00
FF20 00		DEFB	$00
FF21 00		DEFB	$00
FF22 00		DEFB	$00
FF23 00		DEFB	$00
FF24 00		DEFB	$00
FF25 00		DEFB	$00
FF26 00		DEFB	$00
FF27 00		DEFB	$00
FF28 00		DEFB	$00
FF29 00		DEFB	$00
FF2A 00		DEFB	$00
FF2B 00		DEFB	$00
FF2C 00		DEFB	$00
FF2D 00		DEFB	$00
FF2E 00		DEFB	$00
FF2F 00		DEFB	$00
FF30 00		DEFB	$00
FF31 00		DEFB	$00
FF32 00		DEFB	$00
FF33 00		DEFB	$00
FF34 00		DEFB	$00
FF35 00		DEFB	$00
FF36 00		DEFB	$00
FF37 00		DEFB	$00
FF38 00		DEFB	$00
FF39 00		DEFB	$00
FF3A 00		DEFB	$00
FF3B 00		DEFB	$00
FF3C 00		DEFB	$00
FF3D 00		DEFB	$00
FF3E 00		DEFB	$00
FF3F 00		DEFB	$00
FF40 00		DEFB	$00
FF41 00		DEFB	$00
FF42 00		DEFB	$00
FF43 00		DEFB	$00
FF44 00		DEFB	$00
FF45 00		DEFB	$00
FF46 00		DEFB	$00
FF47 00		DEFB	$00
FF48 00		DEFB	$00
FF49 00		DEFB	$00
FF4A 00		DEFB	$00
FF4B 00		DEFB	$00
FF4C 00		DEFB	$00
FF4D 00		DEFB	$00
FF4E 00		DEFB	$00
FF4F 00		DEFB	$00
FF50 00		DEFB	$00
FF51 00		DEFB	$00
FF52 00		DEFB	$00
FF53 00		DEFB	$00
FF54 00		DEFB	$00
FF55 00		DEFB	$00
FF56 00		DEFB	$00
FF57 00		DEFB	$00
FF58 00		DEFB	$00
FF59 00		DEFB	$00
FF5A 00		DEFB	$00
FF5B 00		DEFB	$00
FF5C 00		DEFB	$00
FF5D 00		DEFB	$00
FF5E 00		DEFB	$00
FF5F 00		DEFB	$00
FF60 00		DEFB	$00
FF61 00		DEFB	$00
FF62 00		DEFB	$00
FF63 00		DEFB	$00
FF64 00		DEFB	$00
FF65 00		DEFB	$00
FF66 00		DEFB	$00
FF67 00		DEFB	$00
FF68 00		DEFB	$00
FF69 00		DEFB	$00
FF6A 00		DEFB	$00
FF6B 00		DEFB	$00
FF6C 00		DEFB	$00
FF6D 00		DEFB	$00
FF6E 00		DEFB	$00
FF6F 00		DEFB	$00
FF70 00		DEFB	$00
FF71 00		DEFB	$00
FF72 00		DEFB	$00
FF73 00		DEFB	$00
FF74 00		DEFB	$00
FF75 00		DEFB	$00
FF76 00		DEFB	$00
FF77 00		DEFB	$00
FF78 00		DEFB	$00
FF79 00		DEFB	$00
FF7A 00		DEFB	$00
FF7B 00		DEFB	$00
FF7C 00		DEFB	$00
FF7D 00		DEFB	$00
FF7E 00		DEFB	$00
FF7F 00		DEFB	$00
FF80 00		DEFB	$00
FF81 00		DEFB	$00
FF82 00		DEFB	$00
FF83 00		DEFB	$00
FF84 00		DEFB	$00
FF85 00		DEFB	$00
FF86 00		DEFB	$00
FF87 00		DEFB	$00
FF88 00		DEFB	$00
FF89 00		DEFB	$00
FF8A 00		DEFB	$00
FF8B 00		DEFB	$00
FF8C 00		DEFB	$00
FF8D 00		DEFB	$00
FF8E 00		DEFB	$00
FF8F 00		DEFB	$00
FF90 00		DEFB	$00
FF91 00		DEFB	$00
FF92 00		DEFB	$00
FF93 00		DEFB	$00
FF94 00		DEFB	$00
FF95 00		DEFB	$00
FF96 00		DEFB	$00
FF97 00		DEFB	$00
FF98 00		DEFB	$00
FF99 00		DEFB	$00
FF9A 00		DEFB	$00
FF9B 00		DEFB	$00
FF9C 00		DEFB	$00
FF9D 00		DEFB	$00
FF9E 00		DEFB	$00
FF9F 00		DEFB	$00
FFA0 00		DEFB	$00
FFA1 00		DEFB	$00
FFA2 00		DEFB	$00
FFA3 00		DEFB	$00
FFA4 00		DEFB	$00
FFA5 00		DEFB	$00
FFA6 00		DEFB	$00
FFA7 00		DEFB	$00
FFA8 00		DEFB	$00
FFA9 00		DEFB	$00
FFAA 00		DEFB	$00
FFAB 00		DEFB	$00
FFAC 00		DEFB	$00
FFAD 00		DEFB	$00
FFAE 00		DEFB	$00
FFAF 00		DEFB	$00
FFB0 00		DEFB	$00
FFB1 00		DEFB	$00
FFB2 00		DEFB	$00
FFB3 00		DEFB	$00
FFB4 00		DEFB	$00
FFB5 00		DEFB	$00
FFB6 00		DEFB	$00
FFB7 00		DEFB	$00
FFB8 00		DEFB	$00
FFB9 00		DEFB	$00
FFBA 00		DEFB	$00
FFBB 00		DEFB	$00
FFBC 00		DEFB	$00
FFBD 00		DEFB	$00
FFBE 00		DEFB	$00
FFBF 00		DEFB	$00
FFC0 00		DEFB	$00
FFC1 00		DEFB	$00
FFC2 00		DEFB	$00
FFC3 00		DEFB	$00
FFC4 00		DEFB	$00
FFC5 00		DEFB	$00
FFC6 00		DEFB	$00
FFC7 00		DEFB	$00
FFC8 00		DEFB	$00
FFC9 00		DEFB	$00
FFCA 00		DEFB	$00
FFCB 00		DEFB	$00
FFCC 00		DEFB	$00
FFCD 00		DEFB	$00
FFCE 00		DEFB	$00
FFCF 00		DEFB	$00
FFD0 00		DEFB	$00
FFD1 00		DEFB	$00
FFD2 00		DEFB	$00
FFD3 00		DEFB	$00
FFD4 00		DEFB	$00
FFD5 00		DEFB	$00
FFD6 00		DEFB	$00
FFD7 00		DEFB	$00
FFD8 00		DEFB	$00
FFD9 00		DEFB	$00
FFDA 00		DEFB	$00
FFDB 00		DEFB	$00
FFDC 00		DEFB	$00
FFDD 00		DEFB	$00
FFDE 00		DEFB	$00
FFDF 00		DEFB	$00
FFE0 00		DEFB	$00
FFE1 00		DEFB	$00
FFE2 00		DEFB	$00
FFE3 00		DEFB	$00
FFE4 00		DEFB	$00
FFE5 00		DEFB	$00
FFE6 00		DEFB	$00
FFE7 00		DEFB	$00
FFE8 00		DEFB	$00
FFE9 00		DEFB	$00
FFEA 00		DEFB	$00
FFEB 00		DEFB	$00
FFEC 00		DEFB	$00
FFED 00		DEFB	$00
FFEE 00		DEFB	$00
FFEF 00		DEFB	$00
FFF0 00		DEFB	$00
FFF1 00		DEFB	$00
FFF2 00		DEFB	$00
FFF3 00		DEFB	$00
FFF4 00		DEFB	$00
FFF5 00		DEFB	$00
FFF6 00		DEFB	$00
FFF7 00		DEFB	$00
FFF8 00		DEFB	$00
FFF9 00		DEFB	$00
FFFA 00		DEFB	$00
FFFB 00		DEFB	$00
FFFC 00		DEFB	$00
FFFD 00		DEFB	$00
FFFE 00		DEFB	$00
FFFF 00		DEFB	$00